StochSoCs
An AristeiaII project

SCC NoC

The Objectives of WP2 are:

1) Mapping efficiently the First and Next Reaction Method stochastic simulation algorithms to Intel’s Single Cloud Computer many-cores CPU with a Network on Chip Architecture.

2) Validation and scalability analysis using biomodels of increasing complexity,

Development of SSA implementations for a many-cores CPU (Intel SCC Network on Chip)

In the PC servers world there is a clear trend towards many-core CPUs, with more than 8 processors, connected through a fast network of routers. In the near future we will see such powerful and programmable CPUs also in PC workstations commonly available to scientists. Moreover, they will most probably include some form of reconfigurable hardware allowing next-generation operating systems and applications to exploit domain-specific accelerator hardware blocks (such as SoCs) on the fly. We have created a scalable implementation of Stochastic Simulation Algorithms (both FRM and NRM) for a well supported experimental many-cores CPU, the Intel Single Cloud Computer (SCC). To the best of our knowledge this was the first attempt to port this important class of algorithms to a state-of-the-art Network on Chip (NoC) programmable CPU architecture.

The Deliverables of WP2 are (technical reports):

D2.1 A method for mapping efficiently SSAs to Intel’s SCC many-cores CPU

D2.2 Performance scalability evaluation when simulating biomodels of increasing complexity on the SCC

Publications WP2:

, , Elias S. Manolakos:
Many-core CPUs can deliver scalable performance to stochastic simulations of large-scale biochemical reaction networks. In Proceedings of the 2015 International Conference on High Performance Computing & Simulation, Amsterdam, Netherlands, July 20-24, 2015. IEEE 2015, ISBN 978-1-4673-7812-3, HPCS 2015:517-524 (nominated by the TC committee for outstanding paper award)

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